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L9777C 데이터시트(PDF) 8 Page - STMicroelectronics |
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L9777C 데이터시트(HTML) 8 Page - STMicroelectronics |
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8 / 25 page ![]() Block diagrams and pins configuration L9777 8/25 Doc ID 13496 Rev 2 8I TIMING OPTION A & B: RESET filter time External cap on this pin sets the delay time between NMI and RESET output OPTION C: not used and should be left floating or shorted to ground. 9O VCC Voltage regulator output External cap CVCC ≥ 220 nF is needed to stabilize the regulator 10 O VDD VDD Output regulated voltage switched on/off by VDD_EN pin. External cap CVDD=100 nF is needed to stabilize the regulator 11 GND Ground 12 I RADJ VCC under voltage Threshold Adjustment By connecting this pin to an external resistor divider vs. VCC, is possible to set the VCC under voltage threshold. If this pin is connected to GND the under voltage threshold is set by internal circuit. Table 2. Pin description (continued) Pin# I/O Name Function |
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