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STM8S103F2P3TR 데이터시트(PDF) 52 Page - STMicroelectronics

부품명 STM8S103F2P3TR
상세설명  Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
PDF  113 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STM8S103F2P3TR 데이터시트(HTML) 52 Page - STMicroelectronics

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(2)To calculate P
Dmax(TA), use the formula PDmax =(TJmax- TA)/ΘJA (see Thermal characteristics ) with the
value for TJmax given in the previous table and the value for ΘJA given in Thermal characteristics.
(3)Τ
Jmax is given by the test limit. Above this value the product behavior is not guaranteed.
Figure 9: fCPUmax versus VDD
16
12
8
4
0
2.95
4.0
5.0
5.5
f
CPU (MHz)
Functionality guaranteed
@TA-40 to 125 °C
Supply voltage
Functionality
not
guaranteed
in this area
Table 20: Operating conditions at power-up/power-down
Unit
Max
Typ
Min
Conditions
Parameter
Symbol
μs/V
∞
2
VDD rise time rate
tVDD
∞
2
VDD fall time rate
(1)
ms
1.7
VDD rising
Reset release delay
tTEMP
V
2.85
2.7
2.6
Power-on reset threshold
VIT+
2.8
2.65
2.5
Brown-out reset threshold
VIT-
mV
70
Brown-out reset hysteresis
VHYS(BOR)
(1) Reset is always generated after a t
TEMP delay. The application must ensure that VDD is still above the
minimum ooperating voltage (VDD min) when the tTEMP delay has elapsed.
VCAP external capacitor
10.3.1
Stabilization for the main regulator is achieved connecting an external capacitor CEXT to the
VCAP pin. CEXT is specified in the Operating conditions section. Care should be taken to limit
the series inductance to less than 15 nH.
DocID15441 Rev 6
52/113
STM8S103K3 STM8S103F3 STM8S103F2
Electrical characteristics



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