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TLC32046MFKB 데이터시트(PDF) 22 Page - Texas Instruments |
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TLC32046MFKB 데이터시트(HTML) 22 Page - Texas Instruments |
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22 / 56 page ![]() 2–8 2.15 Communications Word Sequence In the dual-word (telephone interface) mode, there are two data words that are presented to the DSP or µP from the DR terminal. The first data word is the ADC conversion result occurring during the FSR time, and the second is the serial data applied to DATA-DR during the FSD time. FSR is not asserted during secondary communications and FSD is not asserted during primary communications. DX-14 Bits Digital 11 From DSP to DAC 4 Shift Clocks DX-14 Bits Digital XX From DSP Input for D/A Conversion Input for Register Program 2s Complement Output From ADC to the DSP 2s Complement Output From ADC to the DSP Data From DATA-DR to the DSP 16 bits 16 bits Primary Communications Secondary Communications FSX DX FSR DR TLC32046 TLC32046 TLC32046 Dual-Word (telephone interface) Mode Only TLC32046 Dual-Word (telephone interface) Mode Only 16 bits Digital From DATA-DR to DR FSD TLC32046 Dual-Word (telephone interface) Mode Only Figure 2–2. Primary and Secondary Communications Word Sequence 2.15.1 DR Word Bit Pattern The data word is the 14-bit conversion result of the receive channel to the processor in 2s complement format. With 16-bit processors, the data is 16 bits long with the two LSBs at zero. A/D MSB 1st bit sent A/D LSB ↓ ↓ D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 |
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