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AS8515 데이터시트(PDF) 24 Page - ams AG

부품명 AS8515
상세설명  Data Acquisition System with Power Management and LIN Transceiver for 12V Battery Sensor Applications
PDF  65 Pages
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제조업체  AMSCO [ams AG]
홈페이지  http://www.ams.com
Logo AMSCO - ams AG

AS8515 데이터시트(HTML) 24 Page - ams AG

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Revision 0.7
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AS8515
Datasheet - AS8515 To p Die Overview
AC Electrical Characteristics.
LIN Driver, Bus load conditions (CBUS ; RBUS): 1nF; 1k
Ω / 6, 8nF; 660Ω / 10nF; 500Ω
7.17 Timing Diagrams
Figure 15. Timing Diagram for Propagation Delays
Table 25. LIN Driver
Symbol
Parameter
Condition
Min
Typ
Max
Unit
D1
(worst case 20Kbps transmission)
Vth_rec(max) = 0.744 x VSUP;
Vth_dom(max) = 0.581 x VSUP;
VSUP = 6.0V...18V; tbit = 50µs;
D1 = tbus_rec(min) / (2 x tbit)
0.396
D2
(worst case 20kbps transmission)
Vth_rec (min) = 0.422 x VSUP;
Vth_dom (min) = 0.284 x VSUP;
VSUP = 6V...18V; tbit = 50µs;
D2 = tbus_rec(max) / (2 x tbit)
0.581
D3
(worst case 10.4kbps transmission)
Vth_rec (max) = 0.778 x VSUP;
Vth_dom (max) = 0.616 x VSUP;
VSUP = 6.0V...18V; tbit = 96µs;
D3 = tbus_rec(min) / (2 x tbit)
0.417
D4
(worst case 10.4kbps transmission)
Vth_rec (min) = 0.389 x VSUP;
Vth_dom (min) = 0.251 x VSUP;
VSUP = 6V...18V; tbit = 96µs;
D4 = tbus_rec(max) / (2 x tbit)
0.59
tdLR
VCC = 3.3V;
Propagation delay bus dominant to Rx LOW
6µs
tdHR
VCC = 3.3V;
Propagation delay bus dominant to Rx HIGH
6µs
tRS
Receiver delay symmetry
-2
2
µs
tWAKE
Dominant time for wake-up via LIN bus
30
150
µs
tsln
Transition from standby mode to normal
mode (clock frequency is 128KHz ±25%)
4
Clock
cycles
tnsl
Transition from normal mode to standby
mode (clock frequency is 128KHz ±25%)
6
Clock
cycles
trec_deb
Receiver de-bounce time
0.6
3
µs
Cint
Internal capacitance of the LIN node
configured as a slave with a 180pF cap on
the LIN bus
220
250
pF
TxD
BUS
RxD
50%
50%
50%
50%
95%
5%
0%
100
%
tdf_TXD
tdr_TXD
tdf_RXD
tdr_RXD
VBUS



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