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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC5601PEF0MLL6R 데이터시트(PDF) 74 Page - Freescale Semiconductor, Inc |
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MPC5601PEF0MLL6R 데이터시트(HTML) 74 Page - Freescale Semiconductor, Inc |
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74 / 95 page  MPC5602P Microcontroller Data Sheet, Rev. 4.1 Freescale Semiconductor 74 Figure 26. External interrupt timing 3.17.5 DSPI timing Table 39. DSPI timing1 No. Symbol C Parameter Conditions Value Unit Min Max 1tSCK CC D DSPI cycle time Master (MTFE = 0) 60 — ns Slave (MTFE = 0) 60 — 2tCSC CC D CS to SCK delay — 16 — ns 3tASC CC D After SCK delay — 26 — ns 4tSDC CC D SCK duty cycle — 0.4 * tSCK 0.6 * tSCK ns 5tA CC D Slave access time SS active to SOUT valid — 30 ns 6tDIS CC D Slave SOUT disable time SS inactive to SOUT high impedance or invalid — 16 ns 7tPCSC CC D PCSx to PCSS time — 13 — ns 8tPASC CC D PCSS to PCSx time — 13 — ns 9tSUI CC D Data setup time for inputs Master (MTFE = 0) 35 — ns Slave 4— Master (MTFE = 1, CPHA = 0) 35 — Master (MTFE = 1, CPHA = 1) 35 — 10 tHI CC D Data hold time for inputs Master (MTFE = 0) 5 — ns Slave 4 — Master (MTFE = 1, CPHA = 0) 11 — Master (MTFE = 1, CPHA = 1) 5— IRQ 2 3 1 |
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