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LTC1289BCSW 데이터시트(PDF) 16 Page - Linear Technology |
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LTC1289BCSW 데이터시트(HTML) 16 Page - Linear Technology |
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16 / 28 page ![]() 16 LTC1289 1289fb S APPLICATI I FOR ATIO Figure 6 shows an example of an ideal ground plane design for a two-sided board. Of course, this much ground plane will not always be possible, but users should strive to get as close to this ideal as possible. 2. Bypassing For good performance, VCC must be free of noise and ripple. Any changes in the VCC voltage with respect to analog ground during a conversion cycle can induce errors or noise in the output code. VCC noise and ripple can be kept below 0.5mV by bypassing the VCC pin directly to the analog ground plane with a 22 µF tantalum capacitor and leads as short as possible. The lead from the device to the VCC supply should also be kept to a minimum and the VCC supply should have a low output impedance such as that obtained from a voltage regulator (e.g., LT1117). Using a battery to power the LTC1289 will help reduce the amount of bypass capacitance required on the VCC pin. A battery placed close to the device will only require 10 µF to adequately bypass the supply pin. Figure 7 shows the effect of poor VCC bypassing. Figure 8a shows the settling of a LT1117 low dropout regulator with a 22 µF bypass capacitor. The noise and ripple is approximately 0.5mV. Figure 8b shows the response of a lithium battery with a 10 µF bypass capacitor. The noise and ripple is kept below 0.5mV. Figure 7. Poor VCC Bypassing. Noise and Ripple Can Cause A/D Errors. Figure 8a. LT1117 Regulator with 22 µF Bypassing on VCC HORIZONTAL: 20 µs/DIV 5V/DIV CS 0.5mV/DIV VCC Figure 8b. Lithium Battery with 10 µF Bypassing on VCC HORIZONTAL: 20 µs/DIV Figure 6. Example Ground Plane for the LTC1289 V– 22 µF TANTALUM VCC LTC1289 AIF06 0.1 µF CERAMIC DISK ANALOG GROUND PLANE 0.1 µF 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 0.5mV/DIV 5V/DIV CS VCC HORIZONTAL: 10 µs/DIV |
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