AD9524SLASHPCBZ datasheet(55/56 Pages) AD

부품명	AD9524/PCBZ

상세설명	Jitter Cleaner and Clock Generator with 6 Differential or 13 LVCMOS Outputs

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55 / 56 page

Data Sheet

AD9524

Rev. E | Page 55 of 56

Table 62. EEPROM Control 1

Address

Bits

Bit Name

Description

0xB02

[7:2]

Reserved

Reserved.

Soft_EEPROM

When the EEPROM_SEL pin is tied low, setting the Soft_EEPROM bit resets the AD9524 using

the settings saved in EEPROM.

1: soft reset with EEPROM settings (self-clearing).

Enable EEPROM write

Enables the user to write to the EEPROM.

0: EEPROM write protection is enabled. User cannot write to EEPROM (default).

1: EEPROM write protection is disabled. User can write to EEPROM.

Table 63. EEPROM Control 2

Address

Bits

Bit Name

Description

0xB03

[7:1]

Reserved

Reserved.

REG2EEPROM

Transfers data from the buffer register to the EEPROM (self-clearing).

1: setting this bit initiates the data transfer from the buffer register to the EEPROM (writing

process); it is reset by the I²C master after the data transfer is done.

AD9524/PCBZ 데이터시트(PDF) 55 Page - Analog Devices