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ML9489 데이터시트(PDF) 5 Page - List of Unclassifed Manufacturers

부품명 ML9489
상세설명  Static, 1/2 Duty, 1/3 Duty, 1/4 Duty 160 Outputs LCD Driver
PDF  32 Pages
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제조업체  ETC2 [List of Unclassifed Manufacturers]
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ML9489 데이터시트(HTML) 5 Page - List of Unclassifed Manufacturers

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ML9489
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Switching Characteristics
OSC timing
(VDD = 2.7 to 5.5 V, VLCD = 4.5 to 5.5 V, Ta = -40 to +105°C)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Applicable pin
OSC IN clock frequency
(external input)
fCP1
—
1.8
10
kHz
OSC1
Clock pulse width
(External input)
tWCP1
40
—
—
μs
OSC1
Clock rise and fall time
(external input)
tOSC
Clock input from OSC1.
OSC2 and OSCR open.
OSC I/E = "L"
—
—
(*1)
μs
OSC1
External Rf clock
frequency
(Internal oscillation)
fOSC1
Between OSC1 and OSC2
Rf = 470kΩ
(F1,F0)=(0,1)
OSCR open.
OSC I/E = "H"
18
28.8
44
kHz
OSC1, OSC2
Internal clock frequency
(Internal oscillation)
fOSC2
OSC1 open.
(F1,F0)=(0,1)
OSC2 and OSCR short-circuited.
OSC I/E = "H"
18
28.8
44
kHz
OSC1, OSCR,
OSC2
The relation between OSC IN clock frequency and frame frequency is as the equation below.
fFRM = fOSC /24
(*1) tOSC is a reference value.
The longer the clock rise and fall time, the more susceptible to extraneous noises around the threshold value.
Make the rise as steep as possible. Reference value: max=2μs.
Serial interface timing
(VDD = 2.7 to 5.5 V, VLCD = 4.5 to 5.5 V, Ta = -40 to +105°C)
Item
Symbol
Condition
Min.
Typ. Max.
Unit
Applicable pin
Data clock frequency
fCP2
—
—
1
MHz CLOCK
Data clock pulse width
tWCP2
100
—
—
ns
CLOCK
Data setup time
tSU
50
—
—
ns
DATA
Data hold time
tHD
50
—
—
ns
CLOCK
CLOCK-LOAD timing
tCL
100
—
—
ns
CLOCK
LOAD-CLOCK timing
tLC
100
—
—
ns
LOAD
LOAD pulse width
tWLD
100
—
—
ns
LOAD
Signal rise and fall time
tsr,tsf
—
—
(*2)
ns
CLOCK,DATA,
LOAD
(*2) tsr and tsf shall be reference values.
The longer the clock rise and fall time, the more susceptible to extraneous noises around the threshold value.
Make the rise as steep as possible. Reference value: max=10ns.



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