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HVLED807PFTR 데이터시트(PDF) 16 Page - STMicroelectronics |
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HVLED807PFTR 데이터시트(HTML) 16 Page - STMicroelectronics |
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16 / 36 page ![]() Device description HVLED807PF 16/36 Doc ID 023464 Rev 5 1. QR mode at heavy load. Quasi-resonant operation lies in synchronizing MOSFET's turn-on to the transformer's demagnetization by detecting the resulting negative-going edge of the voltage across any winding of the transformer. Then the system works close to the boundary between discontinuous (DCM) and continuous conduction (CCM) of the transformer. As a result, the switching frequency is different for different line/load conditions (see the hyperbolic-like portion of the curves in Figure 11). Minimum turn-on losses, low EMI emission and safe behavior in short circuit are the main benefits of this kind of operation. 2. Valley-skipping mode at medium/ light load. Depending on voltage on COMP pin, the device defines the maximum operating frequency of the converter. As the load is reduced MOSFET's turn-on does not occur any more on the first valley but on the second one, the third one and so on. In this way the switching frequency is no longer increased (piecewise linear portion in Figure 11). 3. Burst-mode with no or very light load. When the load is extremely light or disconnected, the converter enters a controlled on/off operation with constant peak current. Decreasing the load result in frequency reduction, which can go down even to few hundred hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations or recommendations. Being the peak current very low, no issue of audible noise arises. Figure 11. Multi-mode operation of HVLED807PF (constant voltage operation) 4.2 Power section and gate driver The power section guarantees safe avalanche operation within the specified energy rating as well as high dv/dt capability. The Power MOSFET has a VDSS of 800 V min. and a typical RDS(on) of 11 Ω. The internal gate driver of the power MOSFET is designed to supply a controlled gate current during both turn-on and turn-off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned on accidentally. AM13561v1 0 f sw Pinmax Input voltage Pin fosc Burst-mode Valley-skipping mode Quasi-resonant mode |
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