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HVLED807PFTR 데이터시트(PDF) 30 Page - STMicroelectronics |
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HVLED807PFTR 데이터시트(HTML) 30 Page - STMicroelectronics |
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30 / 36 page ![]() Device description HVLED807PF 30/36 Doc ID 023464 Rev 5 Equation 24 where VCLED is internally defined (0.2 V typical - see Table 5: Electrical characteristics). System design tips Starting from the estimated value using the previous formulas, further fine-tuning on the real led driver board could be necessary and it can be easily done considering that: – Decreasing/increasing the RPF resistor value, the power factor effect increase/decrease – Decreasing/increasing the ROS resistor value, the line-regulation effect increase/decrease – Decreasing/increasing the ROS resistor value, the RA+RB resistors value should be increase/decrease to keep the desiderated voltage across the COS capacitor (Equation 22). – Decreasing/increasing the RSENSE resistor value the average output current increase/decrease (Equation 24). 4.12 Layout recommendations A proper printed circuit board layout is essential for correct operation of any switch-mode converter and this is true for the HVLED815PF as well. Careful component placing, correct traces routing, appropriate traces widths and compliance with isolation distances are the major issues. In particular: ● Current sense resistor (RSENSE) should be connected as close as possible to the SOURCE pin, maintaining the trace for the GND as short as possible. ● Resistor connected on CS pin (ROS, RPF, R1) should be connected as close as possible to the pin. ● Compensation network (RCOMP, CCOMP) should be connected as close as possible to the COMP pin, maintaining the trace for the GND as short as possible. ● Signal ground should be routed separately from power ground, as well from the sense resistor trace. ● DMG partition resistors (RDMG, RFB) should be connected as close as possible to the DMG pin, minimizing the equivalent parasitic capacitor on DMG pin. |
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