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CS42L50 데이터시트(PDF) 23 Page - Cirrus Logic |
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CS42L50 데이터시트(HTML) 23 Page - Cirrus Logic |
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23 / 48 page ![]() CS42L50 DS544PP1 23 4.1.19 Clip Detection Status (address 07h) Default = 0 (No clipping detected) Function: The Clip Flags indicate when there is an over-range condition anywhere in the CS42L50 internal signal path. These bits are “sticky”. They constantly monitor the ADC signal path and are set to 1 when an over- range condition occurs. They are reset to 0 when read. 4.2 DAC (Address = 0010001) 4.2.1 Power and Muting Control (address 01h) 4.2.2 AUTO-MUTE (AMUTE) Default = 1 0 - Disabled 1 - Enabled Function: The Digital-to-Analog converter output will mute following the reception of 8192 consecutive audio sam- ples of static 0 or -1. A single sample of non-static data will release the mute. Detection and muting is done independently for each channel. The quiescent voltage on the output will be retained and the Mute Control pin will go active during the mute period. The muting function is affected, similar to volume control changes, by the Soft and Zero Cross bits in the Power and Muting Control register. 4.2.3 SOFT RAMP AND ZERO CROSS CONTROL (SZC) Default = 10 00 - Immediate Change 01 - Zero Cross Digital and Analog 10 - Ramped Digital and Analog 11 - Reserved Function: Immediate Change When Immediate Change is selected all level changes will take effect immediately in one step. Zero Cross Digital and Analog Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a timeout period of 512 sample periods (10.7 ms at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross function is independently monitored and implemented for each channel. 765 4321 0 RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED CLIP_L CLIP_R 000 0000 0 765 4321 0 AMUTE SZC1 SZC0 POR PDNHP PDNLN PDN CP_EN 110 1001 0 |
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