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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CS49310 데이터시트(PDF) 58 Page - Cirrus Logic |
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CS49310 데이터시트(HTML) 58 Page - Cirrus Logic |
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58 / 86 page  CS49300 Family DSP 58 DS339PP4 Figure 36. Autoboot Sequence Notes: 1. RESET must be held LOWTrstl. 2. The RD and WR pins must be configured to select a serial communication mode as defined in the CS493XX Datasheet. The setup (Trstsu) and hold (Trsthld) times must be observed for the RD, WR, and AUTOBOOT pins. 3. INTREQ should be ignored during this period. 200 ms is typical but this time is application code specific and may be higher. Wait times should be verified by the designer. 4. The READ_* and WRITE_* functions are placeholders for the READ_I2C/READ_SPI and WRITE_I2C/WRITE_SPI functions defined in Section 6.1, “Serial Communication” on page 33. CORRECT VALUE? N Y READ_*(VARIABLE) RESET(LOW) (NOTE 1) RESET(HIGH) (NOTE 2) RELEASE ABOOT (NOTE 4) WAIT 5 MS AUTOBOOT COMPLETE WRITE_*(HW_CONFIG_MSG, HW_MSG_SIZE) (NOTE 4) WRITE_*(SW_CONFIG_MSG, SW_MSG_SIZE) (NOTE 4) ABOOT(LOW) WAIT 200 MS (NOTE 3) WRITE_*(KICKSTART, MSG_SIZE) (NOTE 4) |
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