MIC28304 datasheet(31/39 Pages) MICREL

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Micrel, Inc.

MIC28304

PCB Layout Guidelines

Warning: To minimize EMI and output noise, follow

these layout recommendations.

PCB layout is critical to achieve reliable, stable and

efficient performance. A ground plane is required to

control EMI and minimize the inductance in power, signal

and return paths.

The following figures optimized from small form factor

point of view shows top and bottom layer of a four layer

PCB. It is recommended to use mid layer 1 as a

continuous ground plane.

Figure 12. Top And Bottom Layer of a Four-Layer Board

The following guidelines should be followed to insure

proper operation of the MIC28304 converter:

• The analog ground pin (GND) must be connected

directly to the ground planes. Do not route the GND pin

to the PGND pin on the top layer.

• Place the IC close to the point of load (POL).

• Use fat traces to route the input and output power

lines.

• Analog and power grounds should be kept separate

and connected at only one location.

Input Capacitor

• Place the input capacitors on the same side of the

board and as close to the IC as possible.

• Place several vias to the ground plane close to the

input capacitor ground terminal.

• Use either X7R or X5R dielectric input capacitors. Do

not use Y5V or Z5U type capacitors.

• Do not replace the ceramic input capacitor with any

other type of capacitor. Any type of capacitor can be

placed in parallel with the input capacitor.

• If a Tantalum input capacitor is placed in parallel with

the input capacitor, it must be recommended for

switching regulator applications and the operating

voltage must be derated by 50%.

• In “Hot-Plug” applications, a Tantalum or Electrolytic

bypass capacitor must be used to limit the over-voltage

spike seen on the input supply with power is suddenly

applied.

RC Snubber

• Place the RC snubber on the same side of the board

and as close to the SW pin as possible.

SW Node

• Do not route any digital lines underneath or close to

the SW node.

• Keep the switch node (SW) away from the feedback

(FB) pin.

Output Capacitor

• Use a wide trace to connect the output capacitor

ground terminal to the input capacitor ground terminal.

• Phase margin will change as the output capacitor value

and ESR changes. Contact the factory if the output

capacitor is different from what is shown in the BOM.

• The feedback trace should be separate from the power

trace and connected as close as possible to the output

capacitor. Sensing a long high-current load trace can

degrade the DC load regulation.

March 25, 2014

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