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AT45DB321D 데이터시트(PDF) 12 Page - List of Unclassifed Manufacturers |
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AT45DB321D 데이터시트(HTML) 12 Page - List of Unclassifed Manufacturers |
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12 / 52 page ![]() 12 AT45DB321D [DATASHEET] 3597T–DFLASH–11/2013 Table 7-1. WP Pin and Protection Status Time Period WP Pin Enable Sector Protection Command Disable Sector Protection Command Sector Protection Status Sector Protection Register 7.1 Sector Protection Register The nonvolatile sector protection register specifies which sectors are to be protected or unprotected with either the software or hardware controlled protection method. The sector protection register contains 64 bytes of data, in which byte locations 0 through 63 contain values that specify whether sectors 0 through 63 will be protected or unprotected. The sector protection register is user modifiable, and must first be erased before it can be reprogrammed. Table 7-3 illustrates the format of the sector protection register. Table 7-2. Sector Protection Register Sector Number 0 (0a, 0b) 1 to 63 Note: 1. The default value for bytes 0 through 63 when shipped from Adesto® is 00H. x = don’t care. 7.1.1 Erase Sector Protection Register Command In order to modify and change the value of the sector protection register, it must first be erased using the erase sector protection register command. To erase the sector protection register, the CS pin must first be asserted, as it would be with any other command. Once the CS pin has been asserted, the appropriate four-byte opcode sequence must be clocked into the device via the SI pin. The four-byte opcode sequence must start with 3DH, and be followed by 2AH, 7FH, and CFH. After the last bit of the opcode sequence has been clocked in, the CS pin must be deasserted to initiate the internally self-timed erase cycle. The erasing of the sector protection register should take place in a maximum time of tPE, during which time the status register will indicate that the device is busy. If the device is powered down before the completion of the erase cycle, then the contents of the sector protection register cannot be guaranteed. 1 High Command not issued previously – Issue command X Issue command – Disabled Disabled Enabled Read/write Read/write Read/write 2 Low X X Enabled Read only 3 High Command issued during period 1 or 2 – Issue command Not issued yet issue command – Enabled Disabled Enabled Read/write Read/write Read/write Protected See Table 7-3 FFH Unprotected 00H Table 7-3. Sector 0 (0a, 0b) 0a 0b Bit 3, 2 Data Value (Pages 0-7) (Pages 8-127) Bit 7, 6 Bit 5, 4 Bit 1, 0 Sectors 0a, 0b unprotected 00 00 xx xx 0xH Protect sector 0a (pages 0-7) 11 00 xx xx CxH Protect sector 0b (pages 8-127) 00 11 xx xx 3xH Protect sectors 0a (pages 0-7), 0b (pages 8-127)(1) 11 11 xx xx FxH |
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