ADC10D040CIVSSLASHNOPB datasheet(3/32 Pages) TI1

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ADC10D040

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SNAS149G – OCT 2001 – REVISED MARCH 2013

PIN DESCRIPTIONS and EQUIVALENT CIRCUITS

Pin No.

Symbol

Equivalent Circuit

Description

Analog inputs to “I” ADC. With VREF = 1.4V, conversion range is

I+

1.15V to 1.85V with GAIN pin low, or 0.8V to 2.2V with GAIN pin

−

high.

Analog inputs to “Q” ADC. With VREF = 1.4V, conversion range is

Q+

1.15V to 1.85V with GAIN pin low, or 0.8V to 2.2V with GAIN pin

−

high.

Analog Reference Voltage input. The voltage at this pin should be in

the range of 0.6V to 1.6V. With 1.4V at this pin and the GAIN pin

VREF

low, the full scale differential inputs are 1.4 VP-P. With 1.4V at this pin

and the GAIN pin high, the full scale differential inputs are 2.8 VP-P.

This pin should be bypassed with a minimum 1 µF capacitor.

This is an analog output which can be used as a reference source

and/or to set the common mode voltage of the input. It should be

VCMO

bypassed with a minimum of 1 µF low ESR capacitor in parallel with

a 0.1 µF capacitor. This pin has a nominal output voltage of 1.5V

and has a 1 mA output source capability.

Top of the reference ladder. Do not drive this pin. Bypass this pin

VRP

with a 10 µF low ESR capacitor and a 0.1 µF capacitor.

Bottom of the reference ladder. Do not drive this pin. Bypass this

VRN

pin with a 10 µF low ESR capacitor and a 0.1 µF capacitor.

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