STMPE1801 datasheet(25/60 Pages) STMICROELECTRONICS

부품명	STMPE1801

상세설명	Xpander Logic™ 18-bit enhanced port expander with keypad controller

PDF	60 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

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25 / 60 page

STMPE1801

Interrupt system

Doc ID 17884 Rev 3

25/60

9.1

Interrupt system register map

9.2

Interrupt latency for the GPIO hot keys

When the generation of interrupts by the GPIO as input is enabled for the hot keys, the

latency (time taken from actual transition at GPIO to time of INT pin assertion) is shown in

the following table:

Table 11.

Interrupt system register map

Address

Description

Auto-increment

(during sequential R/W)

INT_CTRL_LOW

Interrupt control register

Yes

INT_CTRL_HIGH

Yes

INT_EN_MASK_LOW

Interrupt enable mask register

Yes

INT_EN_MASK_HIGH

Yes

INT_STA_LOW

Interrupt status register

Yes

INT_STA_HIGH

Yes

INT_EN_GPIO_MASK_LOW

Interrupt enable GPIO mask register

Yes

INT_EN_GPIO_MASK_MID

Yes

INT_EN_GPIO_MASK_HIGH

Yes

INT_STA_GPIO_LOW

Interrupt status GPIO register

Yes

INT_STA_GPIO_MID

Yes

INT_STA_GPIO_HIGH

Yes

Table 12.

GPIO hot keys interrupt latency

State of operation

Interrupt latency

Comments

Hibernation

>200 µs (default)

Latency can be programmed by

the GPI_DB bits of SYS_CTRL

Active

>200 µs (default)

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