| 전자부품 데이터시트 검색엔진 |
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GL6965 데이터시트(PDF) 14 Page - Hynix Semiconductor |
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GL6965 데이터시트(HTML) 14 Page - Hynix Semiconductor |
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14 / 23 page ![]() GL6965 14 3. Gain control circuit (PADC) 1) PADC terminal open state. Transmiting and receiving gains vary automatically according to the line current amount (Auto-PAD). With the increase of line current amount; the gain attenuates by about - 3dB at transmiting and about - 5.5dB at receiving. 2) In case PADC terminal is connected to GND by resistance. The gain begins to attenuate with the line current amount less than that when PADC terminal is open. Set the value of resistance to be connected at 25k§ Ù or over. 3) In case PADC terminal is connected to VCC by resistance. The gain begins to attenuate with the line current amount more than that when PADC terminal is open. Set the value of resistance to be connected at 10k§ Ùor over. * Internal equivalent circuit. 4. MUTE circuit (MUTE) The internal equivalent circuit in the MUTE terminal is a shown in the figure below. Since the protective diode is connected between VCC and GND, avoid impressing the voltage over that of VCC or below GND. This is most suitable for input from the output of open drain or open collector type. * Internal equivalent circuit. 20 k§ Ù 5 k§ Ù IPAD PIN20(VCC) PIN12 (PADC) + - PIN9 (MUTE) PIN 20 (VCC) VREF Dialing Mode (High) Speech Mode (High) |
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