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ICS1892 데이터시트(PDF) 129 Page - Integrated Circuit Systems |
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ICS1892 데이터시트(HTML) 129 Page - Integrated Circuit Systems |
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129 / 148 page ![]() Chapter 10 DC and AC Operating Conditions ICS1892, Rev. D, 2/26/01 February 26, 2001 129 ICS1892 © 2000-2001, Integrated Circuit Systems, Inc. All rights reserved. 10.5.6 MII / 100M Stream Interface: Synchronous Receive Timing Table 10-13 lists the significant time periods for the MII / 100M Stream Interface synchronous receive timing (which consists of timings of signals on the RXD[3:0], RXDV, RXER, and RXCLK pins). Figure 10-6 shows the timing diagram for the time periods. Figure 10-6. MII / 100M Stream Interface Synchronous Receive Timing Diagram Table 10-13. MII / 100M Stream Interface: Synchronous Receive Timing Time Period Parameter Conditions Min. Typ. Max. Units t1 RXD[3:0], RXDV, RXER Setup to RXCLK Rise – 10.0 – – ns t2 RXD[3:0], RXDV, RXER Hold after RXCLK Rise – 10.0 – – ns t1 t2 RXCLK RXD[3:0] RXEN RXER |
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