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ICS1892 데이터시트(PDF) 136 Page - Integrated Circuit Systems

부품명 ICS1892
상세설명  10Base-T/100Base-TX Integrated PHYceiver
PDF  148 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS1892 데이터시트(HTML) 136 Page - Integrated Circuit Systems

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ICS1892, Rev. D, 2/26/01
February 26, 2001
136
Chapter 10
DC and AC Operating Conditions
ICS1892 Data Sheet
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.13
MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
Table 10-20 lists the significant time periods for the MII carrier assertion/de-assertion during half-duplex
transmission. The time periods consist of timings of signals on the following pins: TXEN, TXCLK, and CRS.
Figure 10-13 shows the timing diagram for the time periods.
Figure 10-13.
MII Carrier Assertion/De-Assertion Timing Diagram (Half-Duplex Transmission Only)
Table 10-20.
MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Time
Period
Parameter
Conditions
Min.
Typ. Max.
Units
t1
TXEN Sampled Asserted to CRS Assert
–
–
< 1
1
Bit times
t2
TXEN Sampled De-Asserted to CRS De-Asserted
–
–
< 1
1
t3
TXEN De-Asserted to CRS De-Asserted
–
–
–
4
t3
t2
t1
TXEN
TXCLK
CRS



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