3

ICS9147-09

Functionality with (14.31818 MHz input)

Clock Enable Configuration

**Test: is the frequency applied to the X1 input. Can be crystal or tester generated clock overriding crystal at X1 pin.

Address Select

CPUL

(1:2)

CPUH

SDRAM

(1:12)

BUS (1:6)

(MHz)

24M

(MHz)

48M

(MHz)

FS2

FS1

FS0

(MHz)

BSEL=1

BSEL=0

(MHz)

(MHz)

00

0

60

30

32

24

48

00

1

66.8

33.4

32

24

48

01

0

50

25

32

24

48

01

1

55

27.5

32

24

48

10

0

75

37.5

32

24

48

10

1

68.5

34.3

32

24

48

1

1

0

83.3

41.65

32

24

48

1

1

1

Tristate

Tristate

Tristate

Tristate

Tristate

PD#

CPUSTOP#

CPUL (1:2)

CPUH

SDRAM

(1:12)

BUS (1:6)

24MHz

48MHz

REF

1

1

Running

Running

Running

Running

Running

Running

1

0

Stop Low

Running

Running

Running

Running

Running

0

X

Stop Low

Stop Low Stop Low Stop Low Stop Low Stop Low