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changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata

October 1995

COPYRIGHT

INTEL CORPORATION 1995

Order Number 272433-004

80C186EB80C188EB AND 80L186EB80L188EB

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Y

Integrated Feature Set

Low-Power Static CPU Core

Two Independent UARTs each with

an Integral Baud Rate Generator

Two 8-Bit Multiplexed IO Ports

Programmable Interrupt Controller

Three Programmable 16-Bit

TimerCounters

Clock Generator

Ten Programmable Chip Selects with

Integral Wait-State Generator

Memory Refresh Control Unit

System Level Testing Support (ONCE

Mode)

Y

Direct Addressing Capability to 1 Mbyte

Memory and 64 Kbyte IO

Y

Speed Versions Available (5V)

25 MHz (80C186EB2580C188EB25)

20 MHz (80C186EB2080C188EB20)

13 MHz (80C186EB1380C188EB13)

Y

Available in Extended Temperature

Y

Speed Versions Available (3V)

16 MHz (80L186EB1680L188EB16)

13 MHz (80L186EB1380L188EB13)

8 MHz (80L186EB880L188EB8)

Y

Low-Power Operating Modes

Idle Mode Freezes CPU Clocks but

keeps Peripherals Active

Powerdown Mode Freezes All

Internal Clocks

Y

Supports 80C187 Numeric Coprocessor

Interface (80C186EB PLCC Only)

Y

Available In

80-Pin Quad Flat Pack (QFP)

84-Pin Plastic Leaded Chip Carrier

(PLCC)

80-Pin Shrink Quad Flat Pack (SQFP)

The 80C186EB is a second generation CHMOS High-Integration microprocessor It has features that are new

to the 80C186 family and include a STATIC CPU core an enhanced Chip Select decode unit two independent

Serial Channels IO ports and the capability of Idle or Powerdown low power modes

272433 – 1

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