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8XC196KB 데이터시트(PDF) 15 Page - Intel Corporation

부품명 8XC196KB
상세설명  ADVANCED 16-BIT CHMOS MICROCONTROLLER ROMless OR ROM
PDF  17 Pages
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제조업체  INTEL [Intel Corporation]
홈페이지  http://www.intel.com
Logo INTEL - Intel Corporation

8XC196KB 데이터시트(HTML) 15 Page - Intel Corporation

Back Button 8XC196KB Datasheet HTML 9Page - Intel Corporation 8XC196KB Datasheet HTML 10Page - Intel Corporation 8XC196KB Datasheet HTML 11Page - Intel Corporation 8XC196KB Datasheet HTML 12Page - Intel Corporation 8XC196KB Datasheet HTML 13Page - Intel Corporation 8XC196KB Datasheet HTML 14Page - Intel Corporation 8XC196KB Datasheet HTML 15Page - Intel Corporation 8XC196KB Datasheet HTML 16Page - Intel Corporation 8XC196KB Datasheet HTML 17Page - Intel Corporation  
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AUTOMOTIVE 8XC196KB
Parameter
Typical (1)
Minimum
Maximum
Units
Resolution
512
1024
Level
9
10
Bits
Absolute Error
0
g
6
LSBs
Full Scale Error
025 g05
LSBs
Zero Offset Error
b
025 g05
LSBs
Non-Linearity
15 g 25
0
g
4
LSBs
Differential Non-Linearity
l b
1
a
2
LSBs
Channel-to-Channel Matching
g
01
0
g
1
LSBs
Repeatability
g
025
LSBs(1)
Temperature Coefficients
Offset
0009
LSBC(1)
Full Scale
0009
LSBC(1)
Differential Non-Linearity
0009
LSBC(1)
Off Isolation
b
60
dB(1 2 4)
Feedthrough
b
60
dB(1 2)
VCC Power Supply Rejection
b
60
dB(1 2)
Input Resistance
1K
5K
X(1)
DC Input Leakage
0
3
m
A
Sample Time (Prescaler onoff)
158
States (3)
Input Capacitance
3
pF
NOTES
These values are expected for most parts at 25 C but are not tested or guaranteed
An ‘‘LSB’’ as used here has a value of approximately 5 mV (See Automotive Handbook for AD glossary of terms
1 These values are not tested in production and are based on theoretical estimates andor laboratory test
2 DC to 100 KHz
3 One state e 125 ns
16 MHz 333 ns
6 MHz
4 Multiplexer Break-Before-Make Guaranteed
80C196KB FUNCTIONAL DEVIATIONS
The 80C196KB has the following problems
1 The HSI unit has two errata one dealing with res-
olution and the other with first entries into the
FIFO
The HSI resolution is 9 states instead of 8 states
Events on the same line may be lost if they occur
faster than once every 9 state times
There is a mismatch between the 9 state time HSI
resolution and the 8 state time timer This causes
one time value to be unused every 9 timer counts
Events may receive a time-tag one count later
than expected because of this ‘‘skipped’’ time val-
ue
If the first two events into an empty FIFO (not
including the Holding Register) occur in the same
internal phase both are recorded with one time-
tag Otherwise if the second event occurs within
9 states after the first its time-tag is one count
later than the first’s If this is the ‘‘skipped’’ time
value the second event’s time-tag is 2 counts lat-
er than the first’s
If the FIFO and Holding Register are empty the
first event will transfer into the Holding Register
after 8 state times leaving the FIFO empty again
If the second event occurs after this time it will
act as a new first event into an empty FIFO
2 If an AD conversion in progress is aborted by
starting a new AD conversion results of the sec-
ond conversion may be inaccurate
15



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