AN3316 datasheet(11/42 Pages) STMICROELECTRONICS

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AN3316

Device modes

Doc ID 18232 Rev 2

11/42

SAFE mode

This is a chip-wide service mode which may be entered on the detection of a recoverable

error. It forces the system into a pre-defined safe configuration from which the system may

try to recover.

TEST mode

This is a chip-wide service mode which is intended to provide a control environment for

device self-test. It may enable the application to run its own self-test like Flash checksum.

2.2.2

Running modes

RUNx (x=0:3) modes

These are software running modes where most processing activity is done. These modes

are intended to be used by software to execute full performance application routines.

The availability of 4 running modes allow to enable different clock and power configurations

of the system with respect to each other.

SPC560B device supports WAIT instruction to stop the core with the capability to restart

with very short latency (< 4 system clocks)

2.2.3

Low Power modes

HALT mode

This mode is intended as a first level low-power mode in which the platform is stopped but

system clock can remain the same as in running mode. This is a reduced-activity low-power

mode during which the clock to the core is disabled. It can be configured to switch off analog

peripherals like PLL, Flash, main regulator etc. for efficient power management at the cost

of higher wakeup latency.

STOP mode

This mode is intended as an advanced low-power mode during which the clock to the

platform is stopped. It may be configured to switch off most of the peripherals including

oscillator for efficient power management at the cost of higher wakeup latency.

STANBY mode

This is a reduced-leakage low-power mode in which only PD0 is connected and power

supply is cut off from most of the device. Wakeup from this mode takes a relatively long time,

and content is lost or must be restored from backup.

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