DocID024130 Rev 2

11/22

AN4231

Application code structure

3.2

Code implementation

The application configures the device to:



Disable the Software Watchdog



Add a RAM wait state due to the fact that one wait state is required when the System

Frequency is >64 MHz



he WKUP Configure all modes and activate all clocks for all peripherals



Configure the PLL to work at 120 MHz with an external oscillator of 40 MHz



Set the GPIO in order to turn on some LEDs



Set the PLL as output clock on the PA0 pin



Set the RMG STANDBY bit to exit from the STANDBY with the Z4 core in RAM



Set the LED 2 (PE5) to toggle five times before to enter in STANDBY



Set tmodule to:

–

clear the WKUP

–

enable the WKUP for a wake up event on the KEY1 (PE0)

–

enable the WKUP interrupt

–

enable the Falling Edge

–

enable the Filter

–

enable pullups on all WKUP pins to stop leakage on unconnected pins

–

wait until the KEY4 (PE3) is pulled low



Enter the STANDBY mode from the Mode entry MCTL register.



Configure the locator file to copy from FLASH to RAM the boot code



Configure the boot code for the Z4 core in order to:

–

Configure the MMU for SRAM, BAM, Peripheral Bridge.

–

Disable the Software Watchdog again

–

Initialize the stack pointer, sdata base and sdata2 base

–

Enable the SPE in MSR register

–

Configure the internal Flash

–

Set the address to return from standby code in RAM to toggle some LEDs

3.2.1

Disable Software Watchdog

This function allows disabling the Software Watchdog using a key word to permit the access

to the control register of the SWT module.

The SWT is disabled in order to avoid that the period execution of watchdog service could

release a system reset.

Figure 5. Software Watchdog function