AN4253 datasheet(16/44 Pages) STMICROELECTRONICS

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RGM block

AN4253

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DocID024255 Rev 2

5.1.1

Code sequence

32b read from RGM address 0xC3FE4000

5.2

POR/destructive/external reset check

POR, destructive and external resets are destructive to RAM memory content. It means that

the entire RAM memory must be initialized in the startup.

External reset is destructive only if STCU BIST tests are enabled. If STCU built–in self test

is not used, external reset can be omitted from the check.

5.2.1

Code sequence

Do AND operation between read FES_DES value and mask 0x8000FFFF

If the result != 0x0 > destructive reset, RAM corrupted

5.3

Expected functional reset

This analysis is application specific as some reset can be used from the application to

change the mode of the ECU.

In most cases the startup analysis requires additional information from the application to

decide if the reset was expected or unexpected. One possibility is to use a small RAM

memory block that serves as non-volatile storage, valid only if the reset is functional one.

5.4

User specific code for given expected reset

If the reset was expected the user provides the necessary startup code. In most case it can

be by setting special flags or to set appropriate values in the non-volatile RAM block.

5.5

Save reset flags

Similar to FCCU save operation:

•

Non-volatile RAM is used to exchange data between the startup code and the

application. In case of a destructive reset the entire memory will be cleared.

•

One of the core registers like SPRGx. These registers are usually used by the

application or operating system for non specific purposes.

5.6

Clear reset flags

Reset flags are cleared with write-‘1’-to-clear operation to RGM base address (FES+DES

registers).A clear operation is needed in case the microcontroller is in safe state to enable

mode entry transition.

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