TN0108

Reset and BAM

Doc ID 15874 Rev 2

19/26

6.4

Unused BAM space abort

The SPC560B BAM code is implemented as an 8 KB ROM block at the bottom of the

memory map (0xFFFF_C000 to 0xFFFF_FFFF). The BAM code itself is considerably

smaller than the 8 KB ROM block. It is desirable to trap any attempt to execute non BAM

code within this ROM block. In Power Architecture, an instruction with all bits set to zero is

defined as an illegal instruction, which can be trapped.

On Cut 1.1 devices, non BAM locations were left as non-zero, so if the PC was set to a non

BAM location within the ROM block, an undefined operation would result.

On Cut 2 devices, unused locations within the ROM block have been set to zero, to any

attempt to execute from within this area will result in an exception.

This has no real impact for customer code, but is listed here in the case customers notice

the change to the BAM and are concerned that there is a functional change in the BAM

code.

Table 18.

RGM_DERD and RGM_FERD write-once protection

Silicon revision

Write protection mechanism

Implications

SPC560B Cut 1.1

Any write to DERD or FERD would write-protect

both registers.

If configuring both registers, need to do

so with single 32-bit write.

SPC560B Cut 2

Individual 16-bit protection on each register.

Write to DERD (read-only) will not block

subsequent write to FERD.