Introduction

AN1707

3/5

Fig. 4: TPR schematic: LDMOS On

The Vcc voltage is regulated by the power

LDMOS, driven by the CMOS comparator with

hysteresis.

When the LDMOS is in the OFF state, the energy

arrives at the VSUP pin, and the current passes

across the D1 and D2 diodes, charging the C1

and C2 capacitors, and increasing the Vcc voltage

value.

When the LDMOS is in the ON state, the energy

discharges versus the ground and the Vcc voltage

value decreases with reference to the application

consumption.

As shown in

current behavior on the VSUP pin. This behavior

is generated by an RC circuit supplied periodically

with a duty cycle of 50%.

When the LDMOS is in the OFF state, the positive

current pulse charges C1 and C2 capacitors and

the negative current pulse goes across the

internal LDMOS diode.

When the TPR threshold reaches Vtpron, almost

13.15 V, the comparator switches the LDMOS to

the ON state.

Fig. 5: VSUP current behavior

In this case, the positive current pulse goes

across the LDMOS (Ron) and discharges to

ground, while the negative current pulse is divided

between the Ron and the internal diode.

When

Vcc

voltage

reaches

Vtproff,

almost

12.85 V, the comparator turns off the LDMOS and

the current pulses charge the C1 and C2

capacitors again.

the TD220/221 application.

V 13V

Threshold Comparator High = 13.15V

Threshold Comparator Low = 12.85V

VCC

VCC

VCAP

VSUP

C1

C2

D1

D2

LDMOS

t

Isup