| 전자부품 데이터시트 검색엔진 |
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AN1707 데이터시트(PDF) 4 Page - STMicroelectronics |
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AN1707 데이터시트(HTML) 4 Page - STMicroelectronics |
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4 / 5 page ![]() AN1707 UVLO Start Up 4/5 2 UVLO START UP The UVLO startup feature requires an off-line voltage, together with a resistor, to be connected to the Vcc pin, as shown in Figure 1 on page 1. The Vcc waveform at startup is shown in Figure 7. You should study the charging and discharging time of the C1 capacitor time in order to choose the optimum value of C1 for your application. The C1 value should insure a sufficient discharge delay time to avoid reaching the UVLOL voltage value (8.2 V) which would turn off the circuit before the first current pulses arrive. Fig. 6: VSUP and VCAP dynamic behavior Fig. 7: UVLO Start Up and Ivsup C1 and C2 charging time C1 and C2 dicharging time Vcc = 13V RMS (DC) C1 and C2 charging time C1 and C2 dicharging time Vcc = 13V RMS (DC) Ivsup on Vcap UVLOH = 14.1V UVLOL = 8.2V VCC Vtpron = 13.15V Vtproff = 12.85V Choise of C1 for the minimum margin in order to guarantee the circuit ON state Ivsup on Vcap UVLOH = 14.1V UVLOL = 8.2V VCC Vtpron = 13.15V Vtproff = 12.85V Choise of C1 for the minimum margin in order to guarantee the circuit ON state Ivsup on Vcap UVLOH = 14.1V UVLOL = 8.2V VCC Vtpron = 13.15V Vtproff = 12.85V Choise of C1 for the minimum margin in order to guarantee the circuit ON state |
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