Component selection guidelines

AN3115

18/28

Doc ID 16830 Rev 3

The most important parameter for the DC-DC output electrolytic capacitors is the effective

series resistance (ESR). The DC-DC converter control loop circuit has been designed to

work properly with low-cost electrolytic capacitors which have ESR in the range of 200 m

Ω.

A 220 µF with ESR between 100 m

Ω and 350 mΩ is a good choice in most application

conditions. In case it is requested to further reduce the switching noise, a ferrite bead with a

current rating of at least 2 A and impedance higher than 60

Ω at 100 MHz could be used.

In this case It is recommended to use two electrolytic capacitors of 100 µF (see C3 and C3A

in Figure 9) with ESR between 150 m

Ω and 350 mΩ adding the ferrite bead in accordance

to Figure 9.

The DC-DC capacitor's voltage rating must be at least 25 V, but higher voltage capacitors

are recommendable.

2.6

Input capacitors (C1)

An electrolytic bypass capacitor (C1 in Figure 6) between 100 µF and 470 µF, located close

to the LNBH23L, is needed for stable operation. In any case, a ceramic capacitor (C2 in

Figure 6

) between 100 nF and 470 nF is recommended to reduce the switching noise at the

2.7

PDC optional external circuit

This optional circuit, internally controlled by the PDC output pin, acts as an active pull-down

discharging the output capacitance only when the internal 22 kHz tone is activated

(TEN=TTX=1 or DSQIN=1).

capacitive load up to 250 nF where the PDC pin can be left floating.

Figure 9.

DC-DC converter output stage with ferrite bead