DocID023658 Rev 2

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AN4163

Test results and significant waveforms

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reaches 2.5 V when the output voltage exceeds a preset value, usually larger than the

When the OVP condition is detected, the gate drive activity is immediately stopped until the

voltage on the pin PFC_OK drops below 2.4 V. Notice that R5, R10, R14 and R23 can be

selected without any constraints. The unique criterion is that both dividers have to sink

a current from the output bus which needs to be significantly higher than the current biasing

the error amplifier and PFC_OK comparator.

The OVP function described above is able to handle “normal” overvoltage conditions,

i.e. those resulting from an abrupt load/line change or occurring at startup. In case the

overvoltage is generated by a feedback disconnection, for instance, when the upper resistor

of the output divider (R6) fails open, the open-loop protection is needed.

The open-loop protection is implemented by the PFC_OK (#6) and INV (#1) pins. If the

voltage of the PFC_OK pin exceeds 2.5 V, and at the same time the voltage on INV pin (#1)

falls below 1.66 V a feedback failure is assumed, and the device is latched off, stopping the

gate drive activity.

The pin PFC_OK doubles its function as a non-latched IC disable: a voltage below

0.23 V will shut down the IC, reducing its consumption below 2 mA. To restart the L4984D

simply let the voltage at the pin rise above 0.27 V.

Note that this function offers a complete protection against not only feedback loop failures or

erroneous settings, but also against a failure of the protection itself. Either resistor of the

PFC_OK divider failing short or open or a PFC_OK pin floating will result in shutting down

the L4984D and stopping the pre-regulator.

The event of an open loop is captured in Figure 40, we can notice the protection intervention

2.7

Power management/housekeeping functions

A communication line with the control IC of the cascaded DC-DC converter can be

established via the disable function included in the PFC_OK pin. Typically this line is used to

allow the PWM controller of the cascaded DC-DC converter to shut down the L4984D in

AM13425v1

CH4: PFC output voltage