AN4213 datasheet(16/42 Pages) STMICROELECTRONICS

16 / 42 page

Designing a TM PFC

AN4213

16/42

DocID023984 Rev 2

Pin 1, 2: feedback network implementation

Figure 6. Pin 1, 2: Feedback network implementation

Pin 1 (INV): Inverting input of the error amplifier. The information on the output voltage of

the PFC pre-regulator is fed into this pin through a resistor divider (R

OUTH

and R

OUTL

). The

internal reference on the non-inverting input is 2.5 V (typ), while the DIS intervention

threshold is 27 μA. R

OUTH

and R

OUTL

are then selected as follows:

Equation 26

Equation 27

The commercial selected values are two resistors in series each 680 k

Ω for R

OUTH

and

OUTL

equal to 8.2 k

Ω.

Pin 2 (COMP): Output of the error amplifier. A compensation network is placed between this

pin and INV (pin 1) in order to achieve stability of the voltage control loop and ensure high

power factor and low THD. It has to be designed with a narrow bandwidth in order to avoid

that the system rejects the output voltage ripple that would bring high distortion of the input

current waveform. Setting a bandwidth (BW) from 20 to 30 Hz, C

COMP

(as shown in

Figure 6) can be calculated as follows:

Equation 28

AM17320v1

INV

COMP

MULT

ZCD

GND

VCC

L6562A

ROUTH

ROUTL

OVP

OUTH

1480



−

OUTH

OUTL

OUT

OUTL

OUTH

159

()

IIR

OUTL

OUTH

COMP

≅

∗

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