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AN4407 데이터시트(PDF) 10 Page - STMicroelectronics |
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AN4407 데이터시트(HTML) 10 Page - STMicroelectronics |
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10 / 19 page ![]() Description AN4407 10/19 DocID025572 Rev 1 In others words, for a fixed value of Ld, (when di/dt is constant), the delay time is more and more evident when the output power increases and the switching current level also increases (Figure 12). Figure 12. Relationship between stray inductance parasitic effect and current switching duration This theoretical situation is confirmed by experimental data during the switching instants for both turn-off and turn-on. 1.2.1 Turn-off If we refer to Figure 13, which shows a turn-off at high power levels, when the driver forces VGG=0, the MOSFET is forced to turn off, but the negative extra-voltage generated over the stray inductance introduces a turn-off delay and consequently higher turn-off switching losses. This can even lead to false turn-on phenomena, which can further increase the turn- off switching power dissipation. Figure 13. Impact of the parasitic effect during the turn-off operation GIPG271120131039FSR GIPG271120131042FSR |
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