AN4650 datasheet(45/102 Pages) STMICROELECTRONICS

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AN4650

Interrupt generation

102

Once the second tap detection procedure is initiated, the second tap is recognized with the

same rule as the first: the slope data must return below the threshold before the Shock

window has expired.

It is important to appropriately define the Quiet window to avoid unwanted taps due to

spurious bouncing of the input signal.

In the double-tap case, if the LIR bit of the TAP_CFG register is set to 0, the interrupt is kept

high for the duration of the Quiet window. If the LIR bit is set to 1, the interrupt is kept high

until the TAP_SRC register is read.

Figure 15. Double-tap event recognition (LIR bit = 0)

4.5.3

Single-tap and double-tap recognition configuration

The LSM6DS3 device can be configured to output an interrupt signal when tapped (once or

twice) in any direction: the TAP_X_EN, TAP_Y_EN and TAP_Z_EN bits of the TAP_CFG

Configurable parameters for tap recognition functionality are the tap threshold and the

Shock, Quiet and Duration time windows.

The TAP_THS[4:0] bits of the TAP_THS_6D register are used to select the unsigned

threshold value used to detect the tap event. The value of 1 LSB of these 5 bits depends on

the selected accelerometer full scale: 1 LSB = (FS_XL)/(25). The unsigned threshold is

applied to both positive and negative slope data.

The Shock time window defines the maximum duration of the overthreshold event: the

acceleration must return below the threshold before the Shock window has expired,

otherwise the tap event is not detected. The SHOCK[1:0] bits of the INT_DUR2 register are

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