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16-BIT TIMING OPERATIONS USING ST7262 OR ST7263B MCUs

So the minimum period (the maximum frequency) that can be measured using the ST7262 16-

bits cascaded timer can be calculated using the following formula.

Figure 13. Minimum measurable period (max. frequency)

2T > T0+T1+T0+T2+T3

T0: Time needed to activate the interrupt routine (10 tCPU), and the time need to wait for the in-

ternal clock rising edge (about 2 tCPU).

T1: Time needed to execute the interrupt routine. Using the example software supplied in this

application note, the input capture interrupt routine needs about 62 tCPU.

T2: The time needed to exit from the interrupt routine (9 tCPU).

T3: This represents the period of time from the start of the interrupt routine until the ICxR reg-

ister is read (about 3 tCPU in the example software).

Using the above values based on the software example:

T0 = 10, T1 = 62 tCPU, T2 = 9 tCPU, T3 = 3 tCPU

2 T > T0+T1+T0+T2+T3

2 T > (12 + 62 + 12 + 9 + 3) * tCPU

> 98 * 0.125 µs

> 12.25

So we can calculate the minimum period Tmin = 6.125 µs.

1.3.2 Using the ST7263B 16-bit timer

1.3.2.1 Maximum Period

Using the ST7263B 16-bit timer, the maximum measurable period tmax can be expressed as

follows:

tmax = FFFFh * Timerclk = 65535 Timerclk

So the maximum period that can measured using the ST7263B 16-bit timer and the ST7262

cascaded timer is the same, however the minimum period is different.

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AN1602 데이터시트(PDF) 13 Page - STMicroelectronics