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STR71x BSPI COMMUNICATION WITH M25P10-A SERIAL FLASH

2 STR71X CONFIGURATION

2.1 I/O CONTROL

Five pins of the STR71x are used:

– The 4 (data and clock) BSPI pins (S1.SCLK, S1.MOSI, S1.MISO, S1.SSN)

– An output (P0.3) pin to select and deselect the M25P10-A

In this application, the P0.3 pin is used to drive the M25P10-A chip select pin. It is configured

as output push-pull (refer to the STR71x Reference Manual for more details).

2.2 BSPI PERIPHERAL

2.2.1 Baud Rates

Firstly, you have to choose the BSPI communication speed. As the clock is given by the mas-

ter,

you

must

configure

the

baud

rate

of

the

STR71x

using

the

function

BSPI_ClockDividerConfig(BSPI1,Divider_factor_bits)

or

directly

with

the

BSPI1_CLK register (refer to STR71x Reference Manual for more details).

Note: In master mode, the Divider_factor_bits parameter must be an even number greater

than five (refer to STR71x Reference Manual for more details).

2.2.2 Clock Phase and Polarity

The next items to configure are the clock polarity and phase. The clock polarity CPOL con-

trols the steady state value of the clock when no data is being transferred.

The clock phase CPHA selects on which clock transition the bit capture is made and conse-

quently on which clock transition data is latched.

You must be careful because some devices do not allow all timing relationships. For instance,

the M25P10-A Serial Flash Memory device accepts only CPOL,CPHA = (0,0) or (1,1) config-

urations.

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