UPD64AMC datasheet(18/64 Pages) NEC

18 / 64 page

µPD64A, 65

Data Sheet U14380EJ2V0DS00

3.4 Control Register 1 (P4)

Control register 1 consists of 8 bits. The contents that can be controlled are as shown below.

When reset, the register becomes 0010 0110B.

Table 3-6. Control Register 1 (P4)

Bit

Name

—

S0/S1

S1/LED

KI/O

Pull-down Pull-down STOP release mode

mode

Set

Fixed

OFF

Disable

OFF

value

to “0”

Enable

LED

OUT

When reset

00100110

: Specifies the input mode of the S0 port. “0” = OFF mode (high impedance); “1” = IN (INPUT mode).

: Specifies the I/O mode of the KI/O port.

“0” = IN (INPUT mode); “1” = OUT (OUTPUT mode).

: Specifies the I/O mode of the S1/LED port. “0” = S1 (INPUT mode); “1” = LED (output mode).

: Specified the use of the STOP mode release by S2 port (with/without pull-down resistor). “0” = disable (pull-

down unavailable); “1” = enable (pull-down available).

: Specifies the availability of the pull-down resistor in S0/S1 port INPUT mode. “0” = OFF (unavailable);

“1” = ON (available)

: Specifies the availability of the pull-down resistor in KI port. “0” = OFF (unavailable);

“1” = ON (available).

Remark In OUTPUT mode or in OFF mode, all the pull-down resistors are automatically disconnected.

UPD64AMC 데이터시트(PDF) 18 Page - NEC