AN2606 datasheet(23/155 Pages) STMICROELECTRONICS

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AN2606

STM32F10xxx devices bootloader

154

STM32F10xxx devices bootloader

4.1

Bootloader configuration

The STM32F10xxx bootloader is activated by applying pattern1 (described in Table 2:

Bootloader activation patterns). The following table shows the hardware resources used by

this bootloader.

The system clock is derived from the embedded internal high-speed RC, no external quartz

is required for the bootloader execution.

Table 6. STM32F10xxx configuration in System memory boot mode

Bootloader

Feature/Peripheral

State

Comment

USART1

bootloader

RCC

HSI enabled

The system clock frequency is 24 MHz

using the PLL.

RAM

512 bytes starting from address

0x20000000 are used by the bootloader

firmware.

System memory

2 Kbytes starting from address

0x1FFFF000 contain the bootloader

firmware.

IWDG

The independent watchdog (IWDG)

prescaler is configured to its maximum

value and is periodically refreshed to

prevent watchdog reset (in case the

hardware IWDG option was previously

enabled by the user).

USART1

Enabled

Once initialized, the USART1 configuration

is: 8 bits, even parity and 1 Stop bit.

USART1_RX pin

Input

PA10 pin: USART1 in reception mode

USART1_TX pin

Output push-pull

PA9 pin: USART1 in transmission mode

SysTick timer

Enabled

Used to automatically detect the serial baud

rate from the host.

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