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AN2695 데이터시트(PDF) 4 Page - STMicroelectronics |
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AN2695 데이터시트(HTML) 4 Page - STMicroelectronics |
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4 / 13 page ![]() Peripherals partly supported by the emulators AN2695 4/13 2 Peripherals partly supported by the emulators Some of the ST10F276Z5 peripherals are partly supported by the emulators. This section describes the limitations encountered in emulating these peripherals. 2.1 A/D converter Compared to that of the ST10F269Zx, the ST10F276Z5 ADC has been improved to support 24 channels instead of 16 and to have a faster conversion time. These improvements have a small impact on the emulation and compatibility with the ST10F269Zx. They are explained in the following sections. 2.1.1 ADC calibration process Description: the ST10F276Z5 ADC auto-calibration process cannot be interrupted for conversion. It was interruptible with the ST10F269Zx and the ST10 bond-out. The duration of the calibration of the ST10F276Z5 is 40 650 cycles, which is very close to the 40 000 CPU clock cycles of the ST10F269Zx. The calibration starts automatically on each Reset (external_hardware, internal_hardware or software reset). During the auto-calibration, the ADCON.ADBSY bit is set (same behavior as the ST10F269Zx and ST10 bond-out). Software impact: before starting the 1st ADC conversion, the application software should check the busy bit in the ADCON register (ADBSY=1 during auto-calibration). There is no impact for subsequent ADC configuration changes. Hardware impact: no impact. ST10F276Z5 emulation impact: no impact if ST’s advice is implemented. Real-time differences due to the change in calibration process duration have to be analyzed for each application. Hint: check the busy bit in ADCON before the 1st initialization of the ADC. 2.1.2 ADC conversion timings Description: to allow faster conversion, the ADC sampling clock has been changed. For the same software configuration, this results in different sampling times for the ST10F276Z5 compared to the ST10F269Zx and the ST10-emulator. To keep the same real-time behavior, the ADC overall timings between 2 consecutive conversions have not been changed. Software impact: to avoid issues caused by sampling time not coherent with external RC filters, it is proposed to modify the software to check which processor of the ST10F276Z5 or the emulator is running the software (by checking ID-chip register), and to set the ADCON sampling clock accordingly. Hardware impact: no impact. ST10F276Z5 emulation impact: no impact if ST’s advice is implemented. |
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