PM0051

Memory organization

Doc ID 14614 Rev 3

7/27

2.2

Medium density STM8S microcontrollers

The memory is divided into two arrays:

●

From 16 to 32 Kbytes of Flash program memory organized in up to 64 pages of 4

blocks of 128 bytes each. The Flash program memory is divided into 2 areas, the user

boot code area (UBC), which size can be configured by option byte, and the main

program memory area. The Flash program memory is mapped in the upper part of the

STM8S addressing space and includes the reset and interrupt vectors.

●

1 Kbytes of data EEPROM (DATA) organized in up to 2 pages of 4 blocks of 128 bytes

each. One block (128 bytes) contains the option bytes of which 13 are used to

configure the device hardware features. The options bytes can be programmed in user,

IAP and ICP/SWIM modes.

Refer to Table 2 for a detailed description of the memory partition for medium density

STM8S microcontrollers.

Table 1.

Low density STM8S memory partition

Area

Page number (1 page=1 block)

Block number (1 block=64 bytes)

Address

Data EEPROM

00

0x00 4000-

0x00 403F

11

0x00 4040-

0x00 407F

22

0x00 4080-

0x00 40BF

...

...

...

99

0x00 4240-

0x00 427F

Option bytes

-

0 (one block only)

0x00 4800-

0x00 483F

Flash program

memory

00

0x00 8000-

0x00 803F

11

0x00 8040-

0x00 807F

22

0x00 8080-

0x00 80BF

...

...

...

127

127

0x00 9FC0-

0x00 9FFF