PM0214 datasheet(154/245 Pages) STMICROELECTRONICS

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The STM32 Cortex-M4 instruction set

PM0214

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DocID022708 Rev 4

3.10.7

VDIV

Divides floating-point values.

Syntax

VDIV{cond}.F32 {Sd,} Sn, Sm

where:

•

‘cond’ is an optional condition code, see Conditional execution on page 64.

•

‘Sd’ is the destination register

•

‘Sn, Sm’ are the operand registers.

Operation

This instruction:

Divides one floating-point value by another floating-point value.

Writes the result to the floating-point destination register.

Restrictions

There are no restrictions.

Condition flags

These instructions do not change the flags.

3.10.8

VFMA, VFMS

Floating-point Fused Multiply Accumulate and Subtract.

Syntax

VFMA{cond}.F32 {Sd,} Sn, Sm

VFMS{cond}.F32 {Sd,} Sn, Sm

where:

•

‘cond’ is an optional condition code, see Conditional execution on page 64.

•

‘Sd’ is the destination register

•

‘Sn, Sm’ are the operand registers.

Operation

The VFMA instruction:

Multiplies the floating-point values in the operand registers.

Accumulates the results into the destination register.

The result of the multiply is not rounded before the accumulation.

The VFMS instruction:

Negates the first operand register.

Multiplies the floating-point values of the first and second operand registers.

Adds the products to the destination register.

Places the results in the destination register.

The result of the multiply is not rounded before the addition.

Restrictions

There are no restrictions.

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