PM0214 datasheet(182/245 Pages) STMICROELECTRONICS

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Core peripherals

PM0214

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DocID022708 Rev 4

; R2 = size/enable

; R3 = attributes

; R4 = address

LDR R0,=MPU_RNR

; 0xE000ED98, MPU region number register

STR R1, [R0, #0x0]

; Region Number

BIC R2, R2, #1

; Disable

STRH R2, [R0, #0x8]

; Region Size and Enable

STR R4, [R0, #0x4]

; Region Base Address

STRH R3, [R0, #0xA]

; Region Attribute

ORR R2, #1

; Enable

STRH R2, [R0, #0x8]

; Region Size and Enable

Software must use memory barrier instructions:

•

Before MPU setup if there might be outstanding memory transfers, such as buffered

writes, that might be affected by the change in MPU settings

•

After MPU setup if it includes memory transfers that must use the new MPU settings.

However, memory barrier instructions are not required if the MPU setup process starts by

entering an exception handler, or is followed by an exception return, because the exception

entry and exception return mechanism cause memory barrier behavior.

Software does not need any memory barrier instructions during MPU setup, because it

accesses the MPU through the PPB, which is a Strongly-Ordered memory region.

For example, if you want all of the memory access behavior to take effect immediately after

the programming sequence, use a DSB instruction and an ISB instruction:

•

A DSB is required after changing MPU settings, such as at the end of context switch.

•

An ISB is required if the code that programs the MPU region or regions is entered using

a branch or call. If the programming sequence is entered using a return from exception,

or by taking an exception, then you do not require an ISB.

Updating an MPU region using multi-word writes

You can program directly using multi-word writes, depending on how the information is

divided. Consider the following reprogramming:

; R1 = region number

; R2 = address

; R3 = size, attributes in one

LDR R0, =MPU_RNR

; 0xE000ED98, MPU region number register

STR R1, [R0, #0x0]

; Region Number

STR R2, [R0, #0x4]

; Region Base Address

STR R3, [R0, #0x8]

; Region Attribute, Size and Enable

Use an STM instruction to optimize this:

; R1 = region number

; R2 = address

; R3 = size, attributes in one

LDR R0, =MPU_RNR

; 0xE000ED98, MPU region number register

STM R0, {R1-R3}

; Region Number, address, attribute, size and enable

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