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LTC1668I 데이터시트(PDF) 2 Page - Linear Technology

부품명 LTC1668I
상세설명  16-Bit, 50Msps DAC
PDF  16 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LTC1668I 데이터시트(HTML) 2 Page - Linear Technology

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LTC1668
LTC1668CG
LTC1668IG
TJMAX = 110°C, θJA = 100°C/W
ORDER PART
NUMBER
Consult factory for Military grade parts.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TOP VIEW
G PACKAGE
28-LEAD PLASTIC SSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0 (LSB)
DB14
DB15 (MSB)
CLK
VDD
DGND
VSS
COMP2
COMP1
IOUT A
IOUT B
LADCOM
AGND
IREFIN
REFOUT
The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = – 5V, LADCOM = AGND = DGND = 0V, IOUTFS = 10mA.
(Note 1)
Supply Voltage (VDD) ................................................ 6V
Negative Supply Voltage (VSS) ............................... – 6V
Total Supply Voltage (VDD to VSS) .......................... 12V
Digital Input Voltage .................... – 0.3V to (VDD + 0.3V)
Analog Output Voltage
(IOUT A and IOUT B) ........ (VSS – 0.3V) to (VDD + 0.3V)
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC1668C .............................................. 0
°C to 70°C
LTC1668I ........................................... – 40
°C to 85°C
Storage Temperature Range ................ – 65
°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300
°C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DC Accuracy (Measured at IOUTA, Driving a Virtual Ground)
Resolution
16
Bits
Monotonicity
14
Bits
INL
Integral Nonlinearity
±8
LSB
DNL
Differential Nonlinearity
±1
±4
LSB
Offset Error
0.1
±0.2
% FSR
Offset Error Drift
5
ppm/
°C
GE
Gain Error
Internal Reference, RIREFIN = 2k
2
% FSR
External Reference, VREF = 2.5V, RIREFIN = 2k
1
% FSR
Gain Error Drift
Internal Reference
75
ppm/
°C
External Reference
50
ppm/
°C
PSRR
Power Supply Rejection Ratio
VDD = 5V ±5%
±0.1
% FSR/V
VSS = –5V ±5%
±0.1
% FSR/V
Analog Output
IOUTFS
Full-Scale Output Current
q
110
mA
Output Compliance Range
IFS = 10mA
q
–1
1
V
Output Resistance; RIOUTA, RIOUTB
IOUTA, B to LADCOM
q
0.7
1.1
1.5
k
Ω
Output Capacitance
5pF
Reference Output
Reference Voltage
REFOUT Tied to IREFIN Through 2kΩ
2.475
2.5
2.525
V
Reference Output Drift
25
ppm/
°C
Reference Output Load Regulation
ILOAD = 0mA to 5mA
6
mV/mA
PACKAGE/ORDER I FOR ATIO
ABSOLUTE
AXI U
RATI GS
ELECTRICAL CHARACTERISTICS



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