LF48410 datasheet(1/15 Pages) LODEV

부품명	LF48410

상세설명	1024 x 24-bit Video Histogrammer

PDF	15 Pages

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제조업체	LODEV [LOGIC Devices Incorporated]

홈페이지	http://www.logicdevices.com

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DEVICES INCORPORATED

Video Imaging Products

1

LF48410

1024 x 24-bit Video Histogrammer

08/08/2000–LDS.48410-L

u

u 40 MHz Data Input and Compu-

tation Rate

u

u 1024 x 24-bit Memory Array

u

u Histograms of Images up to 4K x

4K with 10-bit Pixel Resolution

u

u Memory Array Flash Clear

u

u User-Programmable Modes:

Histogram, Histogram Accumulate,

Look Up Table, Bin Accumulate,

Delay Memory, Delay and Subtract,

Single Port RAM

u

u Replaces Harris HSP48410

u

u 84-pin PLCC, J-Lead

FEATURES

DESCRIPTION

LF48410

1024 x 24-bit Video Histogrammer

DEVICES INCORPORATED

The LF48410 is capable of generating

histograms and Cumulative Distribu-

tion Functions of video images. It

may also be used as a look up table, a

bin accumulator, a delay memory

(delay and subtract also possible), or a

single port RAM. The on-chip 1024 x

24-bit memory array facilitates

histograms of images up to 4K x 4K

pixels with a 10-bit pixel resolution.

Once the histogram of a video image

is stored in the memory array, the

Cumulative Distribution Function can

be calculated by putting the device in

Histogram Accumulate Mode.

Transformation functions can be

performed on pixel values when the

device is in Look Up Table Mode. If

the Cumulative Distribution Function

is the desired transformation func-

tion, the LF48410 can calculate it and

have it available for Look Up Table

Mode. When the device is in Delay

Memory Mode, it functions as a video

row buffer. In this mode, the LF48410

can buffer video lines as long as 1029

pixels. The device can also function

as an asynchronous single port RAM.

During asynchronous modes, the

device can be configured as a 1024 x

24, 1024 x 16, or 1024 x 8-bit RAM. A

Flash Clear function is provided

which sets all memory array locations

and data path registers to “0”.

LF48410 BLOCK DIAGRAM

CLK

ADDRESS

GENERATOR

CONTROL

WR

DIO

I/F

DIO23-0

24

COUNTER

PIN9-0

10

DIN23-0

24

RAM ARRAY

DATA IN

DATA OUT

WR

ADDRESS

(TO ALL REGISTERS)

RD

UWS

START

FC

FUNCTION

DECODE

FCT2-0

LD

MUX CONTROL SIGNALS

IOA9-0

10

3

ADDER

INPUT

CONTROL

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