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UPD78P014 데이터시트(PDF) 17 Page - NEC |
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UPD78P014 데이터시트(HTML) 17 Page - NEC |
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17 / 62 page ![]() 17 µPD78P014 Figure 2-1. Pin Input/Output Circuits Type 10-A pullup enable data output disable IN/OUT N-ch VREF input enable DD pullup enable data output disable V P-ch N-ch P-ch IN/OUT DD VDD Type 11 open-drain Type 13 data output disable N-ch IN/OUT Middle-High Voltage Input Buffer (Threshold Voltage) V P-ch N-ch P-ch DD V P-ch + – Comparator Type 2 IN pullup enable data output disable V P-ch N-ch P-ch IN/OUT DD VDD Type 5-A input enable Type 5-E pullup enable data output disable V P-ch N-ch P-ch IN/OUT DD VDD Schmitt-Triggered Input with Hysteresis Characteristic Type 8-A pullup enable data output disable V P-ch N-ch P-ch IN/OUT DD VDD Type 16 XT1 feedback cut-off P-ch XT2 |
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