DB929B datasheet(9/51 Pages) CMLMICRO

9 / 51 page

4-Level FSK Modem Data Pump

Page 9 of 50

MX929B PRELIMINARY INFORMATION

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Fax: 336 744 5054

Doc. # 20480171.003

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Recommended External Component Notes:

1. See Section 4.1.10.

2. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least

40% of VDD, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain

crystal oscillator design assistance, consult your crystal manufacturer.

3. The values used for C3 and C4 should be suitable for the frequency of the crystal X1. As a guide, values

(including stray capacitance) of 33pF at 1MHz falling to 18pF at 10MHz will generally prove suitable.

Crystal frequency tolerances are discussed in Section 4.5.3.4.

4. Values C5 and C8 should be equal to 750,000 / symbol rate, e.g.

Symbol Rate

C5 and C8

2400 symbols/second

330pF

4800 symbols/second

150pF

9600 symbols/second

82pF

5. Values C6 and C7 should be equal to 50,000 / symbol rate, e.g.

Symbol Rate

C6 and C7

2400 symbols/second

0.022

4800 symbols/second

0.01

9600 symbols/second

4700pF

DB929B 데이터시트(PDF) 9 Page - CML Microcircuits