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DM385 데이터시트(PDF) 146 Page - Texas Instruments |
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DM385 데이터시트(HTML) 146 Page - Texas Instruments |
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146 / 281 page ![]() M U X PLL_L3L4 DEVOSC/ DEV_CLKIN AUXOSC/ AUX_CLKIN Cortex-A8 PLL_HDVPSS HDVPSS PLL_USB PRCM L3 Fast/Medium, L4 Fast, EDMA, OCMC L3/L4 Slow, GPMC, ELM, McASP, Mailbox, Spinlock SYSCLK4 SYSCLK6 PLL_MEDIACTL ISS, Media Controller SmartReflex USB0/1 PRCM SPI0/1/2/3, I2C0/1/2/3, UART0/1/2, HDMI CEC MMC0/1/2 SYSCLK10 SYSCLK8 PLL_DDR DDR DMM /2 PLL_VIDEO0 HDVPSS SD VENC PLL_VIDEO2 HDMI M U X HDMI PHY HDVPSS VOUT1 HDVPSS VOUT0 M U X PLL_VIDEO1 PLL_AUDIO PRCM MCASP0/1 AUX_CLK, ATL PRCM From PLL_VIDEO0/1/2 RTCDIVIDER WDT0 (Optional) PRCM RTC, GPIO, SyncTimer, Cortex-A8 (Optional) SYSCLK18 From CLKIN32 Pin TIMER1/2/3/4/5/6/7/8 M U X From DEV/AUX Clock, AUD_CLK0/1/2, TCLKIN WDT0 (Optional) RCOSC32K SERDES (Embedded PLL) SERDES_CLK PCIE SERDES (Embedded PLL) M U X EMAC Switch M U X PLL_ARM (Embedded PLL) CLKDCO CLKOUT HDMI I2S From AUX Clock, AUD_CLK0/1/2 M U X M U X SYSCLK20 SYSCLK21 (Note: Separate MUX exists for each PLL) HDVPSS HD VENC M U X M U X From PLL_VIDEO0 DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com Figure 7-7. System Clocking Overview 146 Power, Reset, Clocking, and Interrupts Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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