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NX3L4053 데이터시트(PDF) 12 Page - NXP Semiconductors |
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NX3L4053 데이터시트(HTML) 12 Page - NXP Semiconductors |
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12 / 22 page ![]() NX3L4053 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 — 25 June 2012 12 of 22 NXP Semiconductors NX3L4053 Triple low-ohmic single-pole double-throw analog switch a. Test circuit b. Input and output measurement points Fig 16. Test circuit for measuring break-before-make timing V 001aal743 VCC VIL E nY0 nY1 nS GND nZ G VEXT = 1.5 V VI VO CL RL 001aag572 VI tb-m VO 0.9VO 0.9VO 0.5VI Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. VI may be connected to nS or E. Fig 17. Test circuit for measuring switching times V 001aal744 VCC VIL E nY0 nY1 nS GND nZ G VEXT = 1.5 V VI VO CL RL switch 1 2 |
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