TAS2553_15 datasheet(22/58 Pages) TI

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LD(n)

LD (n+1)

WORD

CLOCK

BIT

CLOCK

DATA

RD(n)

LEFT CHANNEL

RIGHT CHANNEL

LD(n) = n'th sample of left channel data

RD(n) = n'th sample of right channel data

LD(n)

LD(n+1)

WORD

CLOCK

BIT

CLOCK

DATA

N N N

RD (n)

LEFT CHANNEL

RIGHT CHANNEL

LD(n)=n'thsampleofleftchanneldata

RD(n)=n'thsampleofrightchanneldata

LD(n)

LD(n+1)

WORD

CLOCK

BIT

CLOCK

DATA

RD(n)

LEFT CHANNEL

RIGHT CHANNEL

LD(n)=n'thsampleofleftchanneldata

RD(n)=n'thsampleofrightchanneldata

TAS2553

SLAS978B – SEPTEMBER 2013 – REVISED FEBRUARY 2014

www.ti.com

Device Functional Modes (continued)

Figure 33. Timing Diagram for Left-Justified Mode with Offset=0 and Inverted Bit Clock

For left-justified mode, the number of bit-clocks per frame should be greater than twice the programmed word-

length of the data. Also, the programmed offset value should be less than the number of bit-clocks per frame by

at least the programmed word-length of the data.

7.4.1.3 I2S Mode

Set Register 0x03, D(7:6) = 01 and Register 0x05, D(3:2) = 00 to place the TAS2553 audio interface into I2S

mode. In I2S mode, the MSB of the left channel is valid on the second rising edge of the bit clock after the falling

edge of the word clock. Similarly the MSB of the right channel is valid on the second rising edge of the bit clock

after the rising edge of the word clock.

Figure 34. Timing Diagram for I2S Mode

Figure 35. Timing Diagram for I2S Mode with Offset=2

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