PIC17C44 datasheet(62/240 Pages) MICROCHIP

62 / 240 page

PIC17C4X

DS30412C-page 62

9.4.1

PORTE AND DDRE REGISTER

PORTE is a 3-bit bi-directional port. The corresponding

data direction register is DDRE. A '1' in DDRE conﬁg-

ures the corresponding port pin as an input. A '0' in the

DDRE register conﬁgures the corresponding port pin

as an output. Reading PORTE reads the status of the

pins, whereas writing to it will write to the port latch.

PORTE is multiplexed with the system bus. When

operating as the system bus, PORTE contains the con-

trol signals for the address/data bus (AD15:AD0).

These control signals are Address Latch Enable (ALE),

Output Enable (OE), and Write (WR). The control sig-

nals OE and WR are active low signals. The timing for

the system bus is shown in the Electrical Characteris-

tics section.

Note:

This port is conﬁgured as the system bus

when the device’s conﬁguration bits are

selected to Microprocessor or Extended

Microcontroller modes. In the two other

microcontroller modes, this port is a gen-

eral purpose I/O.

Example 9-4 shows the instruction sequence to initial-

ize PORTE. The Bank Select Register (BSR) must be

selected to Bank 1 for the port to be initialized.

EXAMPLE 9-4:

INITIALIZING PORTE

MOVLB

;

Select Bank 1

CLRF

PORTE

;

Initialize PORTE data

;

latches before setting

;

the data direction

;

MOVLW

0x03

;

Value used to initialize

;

data direction

MOVWF

DDRE

;

Set RE<1:0> as inputs

;

RE<2> as outputs

;

RE<7:3> are always

;

read as '0'

FIGURE 9-8:

PORTE BLOCK DIAGRAM (IN I/O PORT MODE)

Note: I/O pins have protection diodes to VDD and Vss.

TTL

Input

Buffer

Port

Data

Data Bus

RD_PORTE

WR_PORTE

RD_DDRE

WR_DDRE

EX_EN

CNTL

DRV_SYS

SYS BUS

Control

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