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PIC18F010 데이터시트(PDF) 49 Page - Microchip Technology

부품명 PIC18F010
상세설명  High Performance Microcontrollers
PDF  176 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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PIC18F010 데이터시트(HTML) 49 Page - Microchip Technology

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 2001 Microchip Technology Inc.
Preliminary
DS41142A-page 47
PIC18F010/020
6.0
TABLE READ/WRITE
INSTRUCTIONS
The PIC18F010/020 has eight instructions that allow
the processor to move data from the data memory
space to the program memory space, and vice versa.
These eight instructions manipulate the Table Pointer
in a manner similar to the FSR’s.
The TBLRD instructions are used to read data from the
program memory space to the data memory space.
The TBLWT instructions are used to write data from the
data memory space to the program memory space.
6.1
Control Registers
A few control registers are used in conjunction with the
TBLRD
and TBLWT instructions. These include the:
• EECON1 register
• TABLAT register
• TBLPTR registers
6.1.1
EECON1 REGISTER
The EECON1 register holds bits to control erase and
write operations in FLASH memory. The EEPGD bit
selects data EEPROM, if clear, or program FLASH
memory, if set. The FREE bit is used to select erasing
versus writing to FLASH. The WREN bit enables writ-
ing. Finally, the WRERR bit indicates any errors. Refer
to Register 5-1 for details.
6.2
Table Reads from FLASH Program
Memory
Table Reads from program memory are performed one
byte at a time. The instruction will access one byte from
the program memory pointed to by the TBLPTR and
transfer that byte to the TABLAT. Figure 6-1 diagrams
the Table Read operation.
The TBLPTR can be updated in one of four ways,
based on the Table Read instructions:
• TBLRD* no-change
• TBLRD*+ post-increment
• TBLRD*- post-decrement
• TBLRD+* pre-increment
The internal program memory is normally word wide.
The Least Significant bit of the address selects between
the high and low bytes of the word. Figure 6-2 shows
the typical interface between the internal program
memory and the TABLAT.
FIGURE 6-1:
TBLRD*
INSTRUCTION OPERATION
Table Pointer
Table Latch (8-bit)
Program Memory
TBLPTRH
TBLPTRL
TABLAT
Prog-Mem
(TBLPTR)
TBLPTRU
Instruction: TBLRD*



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